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openaliro
Aliro reader: UWB/CCC core and ESP32-S3/C5/C6 port
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— map a per-frame STS index to the (dURSK, STS-V) pair the DW3000 STS engine loads. More...
Go to the source code of this file.
Macros | |
| #define | WOZ_CCC_PREPOLL_LISTEN 1 |
| BENCH toggle — run the standalone SP0 Pre-POLL listener instead of the FiRa session. | |
Functions | |
| int | ccc_shim_bind (const uint8_t mursk[CCC_MURSK_LEN], const uint8_t salted_hash[CCC_SALTED_HASH_LEN], uint32_t sts_index0, uint16_t n_slot_per_round) |
| Bind the shim to a ranging session's derived key material. | |
| int | ccc_shim_bind_from_ursk (const uint8_t ursk[CCC_URSK_LEN], const uint8_t *ranging_config, size_t rc_len, uint32_t sts_index0, uint16_t n_slot_per_round) |
| Bind the shim, deriving mURSK + SaltedHash from the URSK + RangingConfiguration. | |
| void | ccc_shim_unbind (void) |
| Unbind the shim; ccc_shim_active returns false afterward. | |
| bool | ccc_shim_active (void) |
| Whether the per-frame STS interception is live (bound AND not suspended). | |
| void | ccc_shim_suspend (bool suspend) |
| Suspend/resume the per-frame IV wrap without unbinding. | |
| int | ccc_shim_sts_for_index (uint32_t sts_index, uint8_t dursk[CCC_DURSK_LEN], uint8_t sts_v[CCC_STS_V_LEN]) |
| Map a per-frame STS index to its CCC dURSK (per-cycle) + STS-V (per-PPDU). | |
| int | ccc_shim_dudsk_for_index (uint32_t sts_index, uint8_t dudsk[CCC_DUDSK_LEN]) |
| Derive the dUDSK (per-cycle Final_Data key) for the ranging cycle containing sts_index. | |
| int | ccc_shim_sts_for_slot (uint32_t slot, uint8_t dursk[CCC_DURSK_LEN], uint8_t sts_v[CCC_STS_V_LEN]) |
| Map a ranging-slot offset (STS_Index0 + slot) to its CCC dURSK + STS-V. | |
| uint32_t | ccc_shim_index_from_iv (const uint8_t iv16[16]) |
| Extract the STS index the blob packed into a DW3000 STS IV (index at bytes 7..4). | |
| uint32_t | ccc_shim_blob_to_ccc_index (uint32_t blob_idx, uint32_t *block, uint32_t *sub) |
| Map the blob's raw provisioned STS index to a CCC-schedule STS index (origin/stride auto-calibrated from the first two indices). | |
| void | ccc_shim_pin_index (uint32_t ccc_index) |
| Pin the substituted STS to one fixed CCC index (bench validation). | |
| void | ccc_shim_unpin (void) |
| Release the debug pin; STS resumes advancing with the blob index. | |
| void | ccc_shim_wrap_log_reset (void) |
| Reset the wrap's first-N-frame IV log budget (target only). | |
| void | ccc_shim_rx_log_reset (void) |
| Reset the responder-RX wrap's first-N-arm log budget (target only). | |
| void | ccc_shim_rx_notify_rx (uint32_t status) |
| Feed each RX event's status word to the empirical STS-index tracker (target only). | |
| void | ccc_shim_rx_try_prepoll (uint16_t datalength) |
| Decode a received SP0 Pre-POLL frame to read Apple's exact POLL STS index (target only). | |
| bool | ccc_shim_rx_awaiting_poll (void) |
| True while an SP3 POLL RX is armed (the next RX-good event is its result). | |
| bool | ccc_shim_rx_deadline_pending (void) |
| True while the responder still owes the current ranging block a radio event: an armed POLL RX (a few slots out) or an armed Final RX (~2 ms out). | |
| bool | ccc_shim_rx_awaiting_final (void) |
| True while an SP3 Final RX is armed. | |
| int | ccc_prepoll_listen (uint8_t channel, uint8_t preamble_code) |
| BENCH: bring up a raw continuous SP0 receiver for the CCC Pre-POLL (target only). | |
| int | ccc_prepoll_prewarm (uint8_t channel, uint8_t preamble_code) |
| Pre-apply the expected session PHY (radio configured, TRX off, RX not armed) so a following ccc_prepoll_listen() with the same params skips the dwt_configure long pole. | |
| void | ccc_prepoll_stop (void) |
| Stop the Pre-POLL listener: close the self-rearm listen-gate, then force the radio off (target only). | |
| uint32_t | ccc_shim_sts_index0 (void) |
The bound session's STS_Index0 (for UAD/Pre-POLL derivation); 0 if unbound. | |
— map a per-frame STS index to the (dURSK, STS-V) pair the DW3000 STS engine loads.
| int ccc_shim_bind | ( | const uint8_t | mursk[CCC_MURSK_LEN], |
| const uint8_t | salted_hash[CCC_SALTED_HASH_LEN], | ||
| uint32_t | sts_index0, | ||
| uint16_t | n_slot_per_round | ||
| ) |
Bind the shim to a ranging session's derived key material.
| mursk | mURSK bytes. |
| salted_hash | SaltedHash bytes. |
| sts_index0 | Initial STS index for this session. |
| n_slot_per_round | Slots per ranging cycle. |
| int ccc_shim_bind_from_ursk | ( | const uint8_t | ursk[CCC_URSK_LEN], |
| const uint8_t * | ranging_config, | ||
| size_t | rc_len, | ||
| uint32_t | sts_index0, | ||
| uint16_t | n_slot_per_round | ||
| ) |
Bind the shim, deriving mURSK + SaltedHash from the URSK + RangingConfiguration.
Bind the shim, deriving mURSK + SaltedHash from the URSK + RangingConfiguration.
| ursk | 256-bit URSK input key. |
| ranging_config | Serialized ranging configuration bytes (may be NULL if rc_len is 0). |
| rc_len | Length of ranging_config in bytes. |
| sts_index0 | Initial STS index for this session. |
| n_slot_per_round | Slots per ranging cycle. |
| uint32_t ccc_shim_blob_to_ccc_index | ( | uint32_t | blob_idx, |
| uint32_t * | block, | ||
| uint32_t * | sub | ||
| ) |
Map the blob's raw provisioned STS index to a CCC-schedule STS index (origin/stride auto-calibrated from the first two indices).
Map the blob's raw provisioned STS index to a CCC-schedule STS index (origin/stride auto-calibrated from the first two indices).
| blob_idx | Blob provisioned STS index. |
| block | Output pointer receiving the ranging-cycle block index (may be NULL). |
| sub | Output pointer receiving the intra-block sub-offset (may be NULL). |
| int ccc_shim_dudsk_for_index | ( | uint32_t | sts_index, |
| uint8_t | dudsk[CCC_DUDSK_LEN] | ||
| ) |
Derive the dUDSK (per-cycle Final_Data key) for the ranging cycle containing sts_index.
Derive the dUDSK (per-cycle Final_Data key) for the ranging cycle containing sts_index.
| sts_index | STS index in the ranging schedule. |
| dudsk | Output buffer receiving dUDSK. |
| uint32_t ccc_shim_index_from_iv | ( | const uint8_t | iv16[16] | ) |
Extract the STS index the blob packed into a DW3000 STS IV (index at bytes 7..4).
Extract the STS index the blob packed into a DW3000 STS IV (index at bytes 7..4).
| iv16 | 16-byte STS IV. |
| void ccc_shim_pin_index | ( | uint32_t | ccc_index | ) |
Pin the substituted STS to one fixed CCC index (bench validation).
| ccc_index | CCC index to pin for all subsequent frames. |
| bool ccc_shim_rx_awaiting_final | ( | void | ) |
True while an SP3 Final RX is armed.
Sample it BEFORE chaining to the blob's RX handler and it says "the reception being serviced IS the Final" — the handler clears the flag and immediately re-arms an SP0 listen. That pre-chain instant is the only point in a ranging block where the radio is idle: no auto-re-enable is configured, so a completed RX leaves the DW3000 in IDLE until the shim arms the next one. The accumulator can only be read there. Reading it after the re-arm returns a fixed non-physical blob, byte-identical at every offset — the receiver is overwriting the accumulator underneath the read (bench runs 2-4, and cir probe shows a clean, correctly-addressed, repeatable window once the session ends). Target only.
True while an SP3 Final RX is armed.
| bool ccc_shim_rx_awaiting_poll | ( | void | ) |
True while an SP3 POLL RX is armed (the next RX-good event is its result).
Target only.
True while an SP3 POLL RX is armed (the next RX-good event is its result).
| bool ccc_shim_rx_deadline_pending | ( | void | ) |
True while the responder still owes the current ranging block a radio event: an armed POLL RX (a few slots out) or an armed Final RX (~2 ms out).
Sample it AFTER chaining to the blob's RX handler and it names the reception just serviced: only the Final leaves it false, with the whole ~192 ms inter-block gap as slack. Diagnostics that need a long SPI burst (the windowed-CIR read) must run only then — bench-proven to cost the round otherwise. Target only.
True while the responder still owes the current ranging block a radio event: an armed POLL RX (a few slots out) or an armed Final RX (~2 ms out).
| void ccc_shim_rx_log_reset | ( | void | ) |
Reset the responder-RX wrap's first-N-arm log budget (target only).
Reset the responder-RX wrap's first-N-arm log budget (target only).
| void ccc_shim_rx_notify_rx | ( | uint32_t | status | ) |
Feed each RX event's status word to the empirical STS-index tracker (target only).
Feed each RX event's status word to the empirical STS-index tracker (target only).
| status | DW3000 status register value. |
| void ccc_shim_rx_try_prepoll | ( | uint16_t | datalength | ) |
Decode a received SP0 Pre-POLL frame to read Apple's exact POLL STS index (target only).
Decode a received SP0 Pre-POLL frame to read Apple's exact POLL STS index (target only).
The decode only feeds the NEXT block's warm (the SP3 arm keys on the pre-warmed prediction, not this block's fresh index), so it has the ~190 ms idle to run in. Running it inline — on the single DW3000 workqueue, ahead of the queued POLL RX-OK callback — pushed the Response TX arm past its slot (dx-now < 0 => HPDWARN). So read the bytes now (cheap SPI), then:
| int ccc_shim_sts_for_index | ( | uint32_t | sts_index, |
| uint8_t | dursk[CCC_DURSK_LEN], | ||
| uint8_t | sts_v[CCC_STS_V_LEN] | ||
| ) |
Map a per-frame STS index to its CCC dURSK (per-cycle) + STS-V (per-PPDU).
Map a per-frame STS index to its CCC dURSK (per-cycle) + STS-V (per-PPDU).
| sts_index | STS index in the ranging schedule. |
| dursk | Output buffer receiving dURSK. |
| sts_v | Output buffer receiving STS-V. |
| int ccc_shim_sts_for_slot | ( | uint32_t | slot, |
| uint8_t | dursk[CCC_DURSK_LEN], | ||
| uint8_t | sts_v[CCC_STS_V_LEN] | ||
| ) |
Map a ranging-slot offset (STS_Index0 + slot) to its CCC dURSK + STS-V.
Map a ranging-slot offset (STS_Index0 + slot) to its CCC dURSK + STS-V.
| slot | Slot offset from STS_Index0. |
| dursk | Output buffer receiving dURSK. |
| sts_v | Output buffer receiving STS-V. |
| void ccc_shim_suspend | ( | bool | suspend | ) |
Suspend/resume the per-frame IV wrap without unbinding.
Suspend/resume the per-frame IV wrap without unbinding.
| suspend | True to suspend, false to resume. |
| void ccc_shim_wrap_log_reset | ( | void | ) |
Reset the wrap's first-N-frame IV log budget (target only).
Reset the wrap's first-N-frame IV log budget (target only).