modules/woz_nfc/src/pn532.h

Overview

NXP PN532 host-protocol driver: frame codec and the command subset needed by the Aliro reader transport. Bus-agnostic and OS-free — all I/O goes through injected bus operations, so the whole layer compiles and runs in the host test suite against a scripted fake bus. Protocol reference: NXP UM0701-02 (PN532 User Manual).

used by pn532.c pn532_bus.h transport_pn532.cpp

API

C`struct pn532_bus_ops`

modules/woz_nfc/src/pn532.h:75

Bus interface for PN532: write (full host frame), wait_ready (poll for chip ready), read (frame bytes, bus prefix stripped). Each returns 0 on success.

C`struct pn532`

modules/woz_nfc/src/pn532.h:92

PN532 NFC reader state: bus ops (read/write/wait_ready callbacks), timeouts (ack_ms, response_ms), and diagnostic fields (last status, frame error, data length, checksum, head bytes).

C`struct pn532_target`

modules/woz_nfc/src/pn532.h:110

Activated ISO14443A target as reported by InListPassiveTarget.

F`static inline bool pn532_target_is_iso_dep(const struct pn532_target *t)`

modules/woz_nfc/src/pn532.h:121

SEL_RES bit 6: target speaks ISO-DEP (ISO14443-4).

#`#define PN532_OK 0`

modules/woz_nfc/src/pn532.h:19

#`#define PN532_ERR_IO (-1)`

modules/woz_nfc/src/pn532.h:20

#`#define PN532_ERR_TIMEOUT (-2)`

modules/woz_nfc/src/pn532.h:21

#`#define PN532_ERR_FRAME (-3)`

modules/woz_nfc/src/pn532.h:22

#`#define PN532_ERR_APP (-4)`

modules/woz_nfc/src/pn532.h:23

#`#define PN532_ERR_STATUS (-5)`

modules/woz_nfc/src/pn532.h:24

#`#define PN532_ERR_SPACE (-6)`

modules/woz_nfc/src/pn532.h:25

#`#define PN532_FRAME_BUF_SIZE 275`

modules/woz_nfc/src/pn532.h:30

#`#define PN532_ACK_READ_LEN 8`

modules/woz_nfc/src/pn532.h:37

#`#define PN532_XFER_CHUNK 240`

modules/woz_nfc/src/pn532.h:41

#`#define PN532_STATUS_ERR_MASK 0x3F`

modules/woz_nfc/src/pn532.h:44

#`#define PN532_STATUS_MI 0x40`

modules/woz_nfc/src/pn532.h:45

#`#define PN532_STATUS_OK 0x00`

modules/woz_nfc/src/pn532.h:46

#`#define PN532_STATUS_TIMEOUT 0x01`

modules/woz_nfc/src/pn532.h:47

C`enum pn532_frame_error`

modules/woz_nfc/src/pn532.h:51

#`#define PN532_FRAME_DIAG_HEAD_SIZE 16`

modules/woz_nfc/src/pn532.h:65

#`#define PN532_REG_CIU_TX_MODE 0x6302`

modules/woz_nfc/src/pn532.h:68

#`#define PN532_REG_CIU_RX_MODE 0x6303`

modules/woz_nfc/src/pn532.h:69

F`const char * pn532_frame_error_name(enum pn532_frame_error error)`

modules/woz_nfc/src/pn532.h:107

F`void pn532_init(struct pn532 p, const struct pn532_bus_ops ops, void *ctx)`

modules/woz_nfc/src/pn532.h:126

F`int pn532_transact(struct pn532 p, uint8_t cmd, const uint8_t params, size_t params_len, uint8_t resp, size_t resp_cap, size_t resp_len, int response_timeout_ms)`

modules/woz_nfc/src/pn532.h:131

F`int pn532_get_firmware_version(struct pn532 *p, uint8_t out[4])`

modules/woz_nfc/src/pn532.h:134

F`int pn532_sam_configuration(struct pn532 *p)`

modules/woz_nfc/src/pn532.h:136

F`int pn532_rf_field(struct pn532 *p, bool on)`

modules/woz_nfc/src/pn532.h:137

F`int pn532_set_retries(struct pn532 *p, uint8_t atr, uint8_t psl, uint8_t passive)`

modules/woz_nfc/src/pn532.h:139

F`int pn532_set_rf_timeouts(struct pn532 *p, uint8_t atr_res_code, uint8_t retry_code)`

modules/woz_nfc/src/pn532.h:142

F`int pn532_write_register(struct pn532 *p, uint16_t addr, uint8_t value)`

modules/woz_nfc/src/pn532.h:143

F`int pn532_comm_thru(struct pn532 p, const uint8_t tx, size_t tx_len, uint8_t rx, size_t rx_cap, size_t rx_len, int timeout_ms)`

modules/woz_nfc/src/pn532.h:149

F`int pn532_list_passive_target_106a(struct pn532 p, struct pn532_target out, int timeout_ms)`

modules/woz_nfc/src/pn532.h:154

F`int pn532_in_data_exchange(struct pn532 p, uint8_t tg, const uint8_t tx, size_t tx_len, uint8_t rx, size_t rx_cap, size_t rx_len, int timeout_ms)`

modules/woz_nfc/src/pn532.h:159

F`int pn532_in_release(struct pn532 *p)`

modules/woz_nfc/src/pn532.h:163

F`uint16_t pn532_crc_a(const uint8_t *data, size_t len)`

modules/woz_nfc/src/pn532.h:166

Overview

API

Cstruct pn532_bus_ops

Cstruct pn532

Cstruct pn532_target

Fstatic inline bool pn532_target_is_iso_dep(const struct pn532_target *t)

##define PN532_OK 0

##define PN532_ERR_IO (-1)

##define PN532_ERR_TIMEOUT (-2)

##define PN532_ERR_FRAME (-3)

##define PN532_ERR_APP (-4)

##define PN532_ERR_STATUS (-5)

##define PN532_ERR_SPACE (-6)

##define PN532_FRAME_BUF_SIZE 275

##define PN532_ACK_READ_LEN 8

##define PN532_XFER_CHUNK 240

##define PN532_STATUS_ERR_MASK 0x3F

##define PN532_STATUS_MI 0x40

##define PN532_STATUS_OK 0x00

##define PN532_STATUS_TIMEOUT 0x01

Cenum pn532_frame_error

##define PN532_FRAME_DIAG_HEAD_SIZE 16

##define PN532_REG_CIU_TX_MODE 0x6302

##define PN532_REG_CIU_RX_MODE 0x6303

Fconst char * pn532_frame_error_name(enum pn532_frame_error error)

Fvoid pn532_init(struct pn532 *p, const struct pn532_bus_ops *ops, void *ctx)

Fint pn532_transact(struct pn532 *p, uint8_t cmd, const uint8_t *params, size_t params_len, uint8_t *resp, size_t resp_cap, size_t *resp_len, int response_timeout_ms)

Fint pn532_get_firmware_version(struct pn532 *p, uint8_t out[4])

Fint pn532_sam_configuration(struct pn532 *p)

Fint pn532_rf_field(struct pn532 *p, bool on)

Fint pn532_set_retries(struct pn532 *p, uint8_t atr, uint8_t psl, uint8_t passive)

Fint pn532_set_rf_timeouts(struct pn532 *p, uint8_t atr_res_code, uint8_t retry_code)

Fint pn532_write_register(struct pn532 *p, uint16_t addr, uint8_t value)

Fint pn532_comm_thru(struct pn532 *p, const uint8_t *tx, size_t tx_len, uint8_t *rx, size_t rx_cap, size_t *rx_len, int timeout_ms)

Fint pn532_list_passive_target_106a(struct pn532 *p, struct pn532_target *out, int timeout_ms)

Fint pn532_in_data_exchange(struct pn532 *p, uint8_t tg, const uint8_t *tx, size_t tx_len, uint8_t *rx, size_t rx_cap, size_t *rx_len, int timeout_ms)

Fint pn532_in_release(struct pn532 *p)

Fuint16_t pn532_crc_a(const uint8_t *data, size_t len)